Spatial Computing & Compilers (2)

I developed a set of SUIF passes to extract parallelism from source code of programs written in C. This set of passes are constitutes a framework targeting a family of architectures called hybrid machines. See this paper if you want to know details. Unfortunately I cannot provide implementation details, because the work has been privately funded, hence details cannot be revealed and every detailed information which can be shared has been published by conference papers. But here I can provide some interesting hint about this matter.

A hybrid architecture: interaction between the two cores is not specified. If concurrent cache access is exploited cache coherency system is required, otherwise is possible unique data access by register files (easily manageable, but probably affected by bottleneck). In general at this level of description the system architecture is not very relent. Even though it becomes important when kernel ranking and complier optimizations have to be performed.

What I built is a set of compilation passes able to discover critical kernels of a program and translate it in a form easily manageable in a spatial domain by SSA. The bulk of the work is about kernel discovery, extraction and their representation, than translation into a spatial formalism is made by SSA as hint here.
What is important to mark is that programs are in general sequential objects and (also thanks to the processor pipeline) very few lines of code in a program are useful to spatially parallelize, even though, having enough space the performance improvement would be huge, above all in certain application domains (DSP, imaging, 3D engine ...).
Posts about 'code intermediate representations' to be appear.